Low Power Design and Optimization, Spring 2007

VADA (VLSI Algorithmic Design Automation) Lab.
Department of Electrical and Computer Engineering Sungkyunkwan University


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  1. Application Specific Integrated Circuit
  2. Low Power Design Overview
  3. Architectureal Level Design
  4. Pipelining and Parallel Processing
  5. Low Power Multiplication/Accumulation
  6. Low power DSP
  7. Low Power High Level Synthesis
  8. Logic Level Synthesis
  9. Circuit Level Synthesis
  10. Low Powr Circuit Optimization
  11. Low Power Booth Multiplier Design
  12. Low Power Layout Design
  13. Clock Issues in Deep Submicron Design
  14. Crosstalk Concerned Physical Design
  15. Power Estimation
  16. Low Power Algorithm for Multimedia Systems
  17. Low Power Embedded Architecture
  18. Partitioning
  19. Low Power System on Chip
  20. Low Power Reconfigurable System
  21. High Speed and Low power copper based SOI processor
  22. Low power voltage scaling
  23. Low power S/W and H/W co-design
  24. Low Power CDMA Searcher
  25. Low Power Viterbi Decoder
  26. Low Power DCT/IDCT Processor
  27. Low Power Equalizer

Download the lecture slides from here

1. Low power Digital Core Design for Multumedia and Communication System Designs

2. System level lowpower designs

 

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