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Our MPSoC platform is built with following
features
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A multiprocessor system-on-chip based
on ARM 926EJ-S processor.
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Operation of MPSoC follows Master-slave mechanism
in which it has one master and other slaves.
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Inter-processor
communication uses interrupt to
synchronization and shared-memory to interchange data. between ARM processor
.This platform connect ARM processors and peripherals by multilayer AMBA-BUS to
assure bandwidth of system and eliminate
bus contention.
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Partitioning H.264 decoder
software and mapping onto this platform to estimate its performance .
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Platform use ConvergenSC software of CoWare company
to simulation and design so that in this platform we can use available
components in library of Platform Architecture of ConvegenSC.
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Components of MPSoC platform
:
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ARM926EJ-S processor
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Multilayer AMBA-Bus includes
Input /Output stages of bus in ConvergenSC library.
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Vector Interrupt Controller
(VIC ) PrimeCell compatible with
VIC device PL90 in PrimeCell of ARM company
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InterruptController avaiable in
library of ConvergenSC
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Shared-memory
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We can use Direct Memory Access
Control (DMAC) in PrimeCell
library.
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Operation of interprocessor
communication based on VIC (Vector Interrupt Controller ):
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Inter-processor communication
plays an important role in MPSoC.We use interrupt and shared memory
techniques in this platform for communicating between processors.We can
describe the operation of communication as follow :
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ARM processor will run scheduling program and send command or
data to other slaves through
shared-memory.ARM slaves will run other partitioned tasks,ARM master will play
as a coordinator for activities
of overall system.
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Communication from master to
slave : To synchronization and signaling to slave which master want to communicate,ARM master will
generate an interrupt by writing command to Software Interrupt Control register in
VIC PrimeCell through AHB bus .After receiving interrupt, slave will run ISR
(Interrupt Service Routine) then check and read neccesary data in shared
memory and excute its corresponding programs.
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Communication from slave to
master : To signaling for
master about its status whether free or busy,finish a taks or not ,slave will
send data to shared memory and
return an interrupt to ARM master through Interrupt Controller.
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This communication can help
exchange and synchrinize between ARM
master and ARM slave in system.
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Example of MPSoC platform built in ConvergenSC
software :
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We show in this report a part
of platform which is built by
Platform Architecture software,in this part we present the connection of
signals between ARM master with VICs (Vector Interrupt Controller) , shared memmory
by multilayer AMBA-bus which is
Input/Output bus stages in this
design and interrupt signal to ARM slave from VIC.
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